Paper-Conference

Behavioral modeling and C-VHDL co-simulation of Network on Chip on FPGA for Education

C Killian, C Tanougast, M Monteiro, C Diou, A Dandache, S Jovanovic

A new deadlock-free fault-tolerant routing algorithm for NoC interconnections

Slavissa Jovanovic, Camel Tanougast, Serge Weber, Christophe Bobda

A new high-performance scalable dynamic interconnection for fpga-based reconfigurable systems

Slavisa Jovanovic, Camel Tanougast, Serge Weber

Initiation à la modélisation et co-simulation comportementale C-VHDL d’un réseau de communication sur Puce (Network on Chip)

C Tanougast, S Jovanovic, F Monteiro, C Diou, A Dandache

Self-organizing System-on-Chip based on Reconfigurable Technology

S Jovanovic, C Tanougast, S Weber

A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs.

Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber

A hardware preemptive multitasking mechanism based on scan-path register structure for FPGA-based reconfigurable systems

Slavisa Jovanovic, Camel Tanougast, Serge Weber

A scalable dynamic infrastructure for dynamically reconfigurable systems

S Jovanovic, C Tanougast, C Bobda, S Weber

Cunoc: A scalable dynamic noc for dynamically reconfigurable fpgas

Slavisa Jovanovic, Camel Tanougast, Serge Weber, Christophe Bobda

Design of power electronic digital controller based on FPGA/SOC using VHDL-AMS language

Slavisa Jovanovic, Philippe Poure